This invention relates to an operational amplifier which is frequency self-compensated with respect to closed-loop gain.
The operational amplifier of the preferred embodiment comprises a transconductance input stage and an amplifier output stage connected serially with each other to receive an input signal on at least one input terminal of the amplifier and generate an amplified signal on an output terminal of the amplifier. Also, an intermediate node is provided between the input and output stages which is connected to a compensation block to receive a frequency-variable compensation signal therefrom.
Reference is made, herein, by way of example and not of limitation, to non-predetermined gain systems wherein the integrated operational amplifier is either part of a single monolithically integrated device or, in a preferred embodiment, a separate circuit element.
As is well known, operational amplifiers are circuit elements of fundamental importance to electronic circuits, and are widely used in a variety of applications.
The most common construction of an operational amplifier basically comprises two serially connected stages, namely a transconductance input stage and an amplifier output stage.
Many applications involve the provision of an external feedback circuit which couples at least one output of the amplifier to an input thereof. Diagrams for a feedback operational amplifier, respectively in inverting and non-inverting configurations, are shown in FIG. 1a and 1b. The operational amplifier is schematically indicated at 1 and has an inverting input terminal IN- and a non-inverting input terminal IN+. In both figures, an output terminal OUT is feedback-connected to the inverting input terminal IN- by a feedback network, schematically represented by a resistor Rf. An input resistor Ri is connected to the inverting input IN-. A voltage signal Vs is input between a signal input IN of the fed-back amplifier and a ground line GND. The sign of the input voltage is in both cases inverted such that, in the inverting configuration, the input signal will be applied to the inverting input IN-, whereas in the non-inverting configuration, it will be applied to the other input IN+. The input voltage actually present across the two inputs of the amplifier is denoted by Vi, and the optionally amplified, output voltage present across the output OUT and the ground line GND is denoted by Vo. Also shown are an input current Ii and a feedback current If flowing through the resistor Rf.
A frequency-oriented analysis of the transfer function of the amplifier 1, that is of the mathematical law that governs the relationship between the input and output signals, enables the frequency-wise behavior and stability of the fed-back amplifier to be determined. For the purpose, it is necessary to consider the transfer function G(s), where s is the complex variable. By transfer function, we mean here the modulo of the transfer function, for which the term gain or transfer ratio will be used as being more appropriate. With specific reference to FIGS. 1a and 1b, Vo=-G(s)Vi. Reference will be made hereinafter to open-loop transfer functions, that is having no external feedback, as denoted by G.sub.ol (s), and to closed-loop functions, as denoted by G.sub.cl (s).
In connection with the stability problems of fed-back circuits, it is generally necessary at the designing stage that attention be paid to possible problems of frequency response therefrom. The need for the fed-back amplifier to be a stable one, even at high frequencies and regardless of the external feedback, means in particular that an open-loop transfer function with suitably located poles and zeros must be provided.
It should be considered that the transfer function has a certain number of poles at certain frequencies, mainly due to the presence of capacitances. With an operational amplifier, these are primarily parasitic capacitances internal of the circuit and loads connected to the amplifier output.
The effects of a pole are, on the one side, a lowering circuit gain from its frequency value at a constant rate of decrease, and on the other side, the introduction of a phase shift, that is a phase change in the transfer function. Furthermore, an interaction with following poles enhances the effect on gain from the individual pole.
FIG. 2 shows, in deciBels and on a log scale, the open-loop gain pattern for an ideal operational amplifier as a function of the frequency f. Only the two main poles of the transfer function are shown for the amplifier, namely a first or dominant pole p1 at a low frequency f1 and a second or non-dominant pole p2 at a high frequency f2.
As can be seen, the non-dominant pole p2 locates here at gain values of less than one in modulo. A closed-loop configuration, that is the case of the feedback loop being closed, will be considered. With a closed-loop gain G.sub.cl of unity value, i.e. G.sub.cl =0dB, the corresponding frequency defined by the intersection of the open-loop function G.sub.ol with the frequency axis, the so-called cutoff frequency, precedes the frequency f2 that corresponds to the non-dominant pole p2. If, as in the ideal case illustrated, the frequency f2 is sufficiently higher than the frequency f.sub.t, the phase .phi. of the closed-loop transfer function is amply less than 180.degree.. This ensures the stability of the fed-back system, in conformity with Bode's criterion for phase and gain.
However, open-loop transfer functions usually exhibit the behavior shown in FIG. 3, which is typical of an unstable fed-back system. Notice that the frequency f2, corresponding to the second pole, is in fact lower than the cutoff frequency f.sub.t of the open-loop gain function G.sub.ol. Thus, the combined effects of the two poles resulting, after the second pole, in a doubled rate of gain decrease and combined phase shifts, are felt before the gain value G.sub.ol has dropped down to unity. Accordingly, the fed-back system with gain close to one has a limited phase margin from 180.degree..
The presence of further poles, not shown, at a higher frequency contributes toward making the fed-back amplifier even more unstable because the phase margin is still more restricted.
In the prior art, to obtain a desired pattern for the open-loop transfer function, effective to ensure the amplifier stability in the fed-back configuration, so-called compensation techniques have been used. These allow, in particular, the pole locations to be altered so as to bring the function profile close to that shown in FIG. 2.
A compensation circuit, commonly consisting of a compensation capacitor, is introduced for the purpose, which allows at least one of the main poles to be shifted in frequency so as to re-locate it. The publication "The Monolithic Op Amp: a Tutorial Study", IEEE Solid-State Circuits, Vol. SC-9, December 1974, pages 314-332 provides a detailed description of that technique, and is hereby incorporated by reference.
The compensation circuit may either be provided outside the device or, more frequently, inside the amplifier. Reference will specifically be made hereinafter to the latter option.
In general, a typical arrangement for compensating a fed-back operational amplifier by internal compensation may be that shown in FIG. 4. As previously mentioned, the amplifier comprises two blocks placed serially between an input terminal IN and an output terminal OUT: an input stage 2 and an output stage 3. Notice that, for simplicity, only the actual input and output terminals, respectively for receiving and generating the signal, have been shown in that figure. As shown in the figure, the blocks 2 and 3 provide amplifications -A1(f) and -A2(f), respectively, which are functions of the frequency f.
For the purpose of frequency compensation, the operational amplifier further includes a compensation block 4 connected between the output terminal OUT and a node S which lies intermediate the input stage 2 and the output stage 3. The block 4 is connected functionally to provide internal feedback, as explained herein below.
Assume, as shown in the figure, that the amplifier is fed back, that is that the output terminal OUT and input terminal IN of the operational amplifier are connected via a feedback circuit 5 outside the amplifier.
The amplifier receives an input signal, schematically illustrated by an arrow S.sub.in, which is specifically applied to the input terminal IN, and supplies an output signal S.sub.out at its output terminal OUT. The external feedback circuit 5 receives that same output signal S.sub.out and generates a feedback signal Sf proportional to the output signal S.sub.out, the proportionality factor being equal to the feedback factor .beta..sub.e (f), in turn tied to frequency, and is characteristic to the feedback circuit of choice. For example, where the feedback is simply provided by the resistor Rf, the factor .beta..sub.e (f) is determined by the split between Rf and the input resistor Ri. The feedback signal Sf is applied to the input terminal IN, represented in the figure by a summing node whereon the input signal S.sub.in and the feedback signal merge together. The compensation block also receives the output signal S.sub.out, and generates a compensation signal Sc which is proportional to the former by an internal feedback factor .beta..sub.i (f) characteristic to the compensation block 4. The compensation signal Sc is supplied to the intermediate node S constituting a further summing node for a signal, denoted by S1, from the input stage 2 and for the aforementioned compensation signal Sc.
Thus, the compensation block 4 produces an internal feedback of sort which is only determined by the amplifier output signal and is always present in the standard case.
As previously mentioned, the compensation feature consists in practice of a capacitive element, typically a capacitor having a capacitance in the range: of a few pF to a few tens of pF, when internal, and of about 100 pF when external. This capacitor is adapted to control the value of the dominant pole, and possibly of the following poles in certain circuit configurations of the amplifier. Basically, the compensation capacitor connected to the intermediate node between the input and output stages will vary the actual capacitance as seen from the aforementioned node, which is material to the determination of the main pole locations.
Among the most widely used compensation techniques are the so-called dominant pole one, which provide for a downward shift of one pole to make it dominant, thereby allowing the gain to attain a unity value while the other poles are still ineffective, and the pole splitting techniques which utilize Miller's Effect.
In the examples which follow, the pole splitting technique will be taken into consideration. The effect of this technique on the transfer function is indeed one of splitting, that is of moving the poles, specifically the two main poles, away from each other. This behavior is illustrated diagrammatically by FIG. 5. The poles p1' and p2' of the compensated amplifier, whose frequencies are denoted by f1' and f2', are shifted from the poles p1 and p2 of the uncompensated amplifier which correspond to the frequencies f1 and f2. In particular, the pole p1 is shifted to the pole p1', at a low dominant frequency f1'&lt;f1. The pole p2 is shifted to the pole p2', at a high frequency f2'&gt;f2.
With the compensated dominant pole at a lower frequency than the uncompensated one, the gain begins to drop at an earlier time, so that the gain function will attain unity value more rapidly. This, when added to the fact that the compensated non-dominant pole is shifted in the opposite direction from that of the dominant pole, ensures that the non-dominant pole is at a frequency exceeding the cutoff frequency f.sub.t by a sufficient margin. Thus, upon compensation, the transfer function will be a similar pattern to that shown in FIG. 2.
Known in the art are several embodiments of frequency-compensated operational amplifiers using a variety of technologies of both the MOS type, such as CMOS, NMOS or PMOS, and the bipolar type.
Shown in FIG. 6 is a first embodiment with CMOS technology of an operational amplifier having a traditional compensation wherein a compensation technique known as Miller's Compensation is used.
The operational amplifier comprises a NMOS output transistor, shown at Tg.sub.mo, having drain and source terminals respectively connected to the output terminal OUT of the amplifier and to ground GND. A current flow is forced through the transistor Tg.sub.mo by a current generator I.sub.po being connected to its drain terminal and powered from a supply terminal which is held at a constant voltage Vdd. The transistor Tg.sub.mo forms substantially the output stage 3 of the amplifier.
A gate terminal of the transistor Tg.sub.mo is connected, through an intermediate node S, to an output of a transconductance block 6 having a transconductance value g.sub.mi. This block also has first and second inputs, designated "+" and "-", which are respectively connected to the input terminals IN- and IN+ of the amplifier. The input stage 2 of the amplifier basically consists of the transconductance block 6 and the resistor ri connected to an output of the block 6 for which it forms the output resistance.
In accordance with prior art techniques, the compensation capacitor, denoted by C.sub.C in the figure, is connected between the gate and the drain of the output transistor Tg.sub.mo, that is between the intermediate node S and the output terminal OUT. This compensation capacitor C.sub.C forms the compensation block 4 of the amplifier.
The voltages Vi and Vo in the figure, which are respectively present across the input terminals IN- and IN+ and across the output terminal OUT and ground, represent the input voltage and the output voltage, respectively.
The compensation capacitor C.sub.C according to that prior art is, therefore, charged from the output. The voltage across it is equal, in fact, to the output voltage Vo, but for the gate-source voltage Vgs of the transistor Tg.sub.mo.
The capacitances C.sub.P, C.sub.L and C.sub.C, where C.sub.L and C.sub.P respectively are the load capacitance connected to the output terminal OUT and the parasitic capacitance present on the gate terminal of Tg.sub.mo, determine the locations of the poles and zeros of the open-loop transfer function of the compensated amplifier.
A calculation based on the equivalent circuit for small signals yields the main poles of the compensated amplifier of FIG. 6. These are identified, with due approximation, by the following relations: EQU p1'(M)=-1/(g.sub.mo r.sub.i r.sub.o C.sub.C) and EQU p2'(M)=-g.sub.mo *K.sub.M /(C.sub.P +C.sub.L) with K.sub.M =C.sub.C / (C.sub.P +C.sub.C)
where, g.sub.mo is the transconductance of the transistor Tg.sub.mo, and r.sub.o is the output resistance of the simplifier. By comparing to the poles of the uncompensated amplifier, a splitting effect of the kind shown in FIG. 5 can be noticed. Lacking compensation, the main poles are expressed, in fact, by p1=-1/r.sub.i C.sub.P and p2=-1/r.sub.o C.sub.L. The shift in the respective frequencies to be obtained from -2.pi./p is readily verified.
The provision of the compensation capacitor C.sub.C also introduces a zero z(M)=g.sub.mo /C.sub.C. This can be eliminated, however, by connecting in series with the compensation capacitor C.sub.C a compensation resistor with a value of 1/g.sub.mo.
A modification of the circuit in FIG. 6 provides, in order to eliminate the zero, for the introduction of a buffer or voltage follower consisting, for example, of a transistor connected in series with a current generator between the compensation capacitor and the output of the operational amplifier. In this way, the capacitor will have no undesired effects on the output voltage. The dominant pole is found from the same relation as in the previous case, whereas the non-dominant pole takes the form p2'(Mb)=-g.sub.mo C.sub.C /(C.sub.P +C.sub.C)C.sub.L.
A further compensation technique has been developed by Bhupendra Ahuja, and is described in detail, for example, in an article entitled "An improved frequency compensation technique for CMOS operational amplifiers", published in IEEE J. Solid-State Circuits, vol. SC-18, No. 6, December 1983, pages 629-633, which is hereby incorporated by reference.
An embodiment based on Ahuja's compensation principle is shown in FIG. 7. This embodiment is similar to that of FIG. 6, except that the compensation block 4 is here a more complicated design. Besides the compensation capacitor C.sub.C, in fact, an additional transistor TB and a pair of current generators I.sub.PI are provided.
The additional transistor TB is of the PMOS type and has a drain terminal connected to the intermediate node S, that is to the gate of Tg.sub.mo, as well as to a generator I.sub.PI, and a source terminal connected to the other generator I.sub.PI. Thus, a constant current is forced through TB. A gate terminal of TB is held at the constant potential VB.
The compensation capacitor C.sub.C has a terminal coupled to the node S through the additional transistor TB, and precisely, directly connected to the source terminal of the transistor TB. The voltage at this terminal of C.sub.C is, in this case, held substantially constant, equal in particular to the value of VB which, as mentioned, is fixed but for the gate-source voltage Vgs of the transistor TB. In a similar way to the circuit based on Miller's principle, the other terminal of C.sub.C is connected to the drain of Tg.sub.mo, that is to the output terminal OUT.
In calculating the characteristic quantities of the transfer function of the open-loop amplifier for this type of compensation, it should be considered that, to determine the non-dominant pole, the actual transconductance as seen from the output end is multiplied by a factor K.sub.A =C.sub.C /C.sub.P given by the particular circuit configuration. The following poles are obtained: EQU p1'(A)=-1/(g.sub.mo r.sub.i r.sub.o C.sub.C) and EQU p2'(A)=-g.sub.mo K.sub.A /(C.sub.C +C.sub.L).
Whereas the dominant pole is left unaltered, the non-dominant pole is shifted toward higher frequencies. Thus, the operational stability range is expanded frequency-wise compared to the previous case, for a compensation capacitor of the same value.
An operational amplifier compensated by conventional techniques of the kind just described has, however, certain drawbacks. Consider applications wherein the amplifier is to operate with different feedbacks, or wherein the closed-loop gain is not predetermined univocally, due to fluctuations in the working parameters during its operation. Take, for example, the instance of electrical systems having discrete elements, wherein the operational amplifier forms a circuit by itself, useful in applications of the audio or telephone type where the feedback can be selected by the user. Also, in a fully integrated device, let us consider the utilization of so-called variable-gain operational amplifiers.
Once the amplifier is designed and fabricated with preset compensation, and therefore, with the open-loop transfer function of the amplifier predetermined, the choice of the fed-back amplifier gain, or closed-loop gain, as determined by the external feedback and essentially by the resistance value applied in the feedback loop as previously explained, is restricted to a relatively narrow range of values.
It should be borne in mind, in this respect, that in the design of fed-back operational amplifiers, special care is taken to maximize the width of the frequency band wherein the amplifier will operate properly and be stable. The selection of certain closed-loop gain values clashes with the requirements for stability and a wide frequency response of the amplifier.
To make this concept more easily understood, two discrete values of closed-loop gain for an amplifier having a predetermined compensation have been shown in FIG. 8a. In FIG. 8b, the same gain values are shown for an amplifier having no compensation or having reduced compensation with respect to the other figure. The numerical gain values are denoted by G1 and G2, with G1&gt;G2 and G2 close to one. The respective frequencies at which the open-loop gain function is cut off are referenced f1a and f2a in FIG. 8a, and f1b and f2b in FIG. 8b. Also shown at f1', f2' and f1, f2 are the frequencies of the main poles.
Where the feedback determines gain values G2 close to one, such as where the fed-back amplifier is configured as a follower, only the compensated amplifier is stable. To have matters better understood, the gain axis should be visualized as shifted to the gain value G2. The frequencies f2a and f2b would then become the cutoff frequencies. Since the frequency f2a precedes the frequency f2' of the non-dominant pole, i.e. f2a=f.sub.t &lt;f2', the compensated amplifier will be stable, as explained hereinabove. The frequency f2b lies instead above the cutoff frequency, i.e. f2b=f.sub.t &gt;f2, with attendant loss of stability for the uncompensated amplifier.
On the other hand, where a particular application requires a high gain, this adversely affects, the width of frequency response. As can be gathered from a comparison of the two figures, for a gain of G1, the width of the response frequency band is too narrow at the higher frequencies, where compensation is used, and is wider for an amplifier with little compensation. It can be seen, in fact, that f1a is significantly less than f1b.
Thus, depending on the particular compensation applied, for a particular choice of gain, one can incur stability problems, on the one side, and excessive constraint on the band and consequent loss of speed, on the other.
This problem is obviated in discrete element systems by using an external compensation capacitor which can be plugged in by the user according to the closed-loop gain value selected.
One underlying technical problem addressed by this application is to provide an operational amplifier which is frequency self-compensated according to the closed-loop gain present in a particular application at a particular time. The compensation value should be controlled automatically, without control from the user, for optimum performance in terms of speed of response and stability of the fed-back amplifier at any gain values.
In particular, an object of this invention is to provide a fed-back operational amplifier which is uniquely versatile, and can be connected in a variety of systems, such as programmable systems, by the user.
The idea underlying the preferred embodiment is that of providing an operational amplifier which includes a compensation capacitor, wherein the voltage across the capacitor is varied according to the feedback applied thereto, and hence to the closed-loop gain. For the purpose, one end of the capacitor is connected to receive a signal generated by the external feedback.
An operational amplifier frequency self-compensated with respect to closed-loop gain, preferably an integrated one, comprises a transconductance input stage and an amplifier output stage connected serially together to receive an input signal on at least one input terminal of the amplifier and generate an amplified signal on an output terminal of the amplifier. Provided between the input and output stages is an intermediate node which is connected to a compensation block to receive a frequency-variable compensation signal therefrom.
According to the preferred embodiment, the compensation block is input coupled to the input terminal of the amplifier. In essence, for frequency compensation, the output terminal is connected to the input terminal of the amplifier by a feedback network including a negative feedback circuit which generates a feedback signal. In the instance of an inverting feedback, the compensation block is downstream connected to the input terminal with respect to the input signal, so as to receive both the input signal and the feedback signal. Where the feedback is non-inverting, the compensation block is connected before the input terminal, toward the feedback network, so as to only receive the feedback signal, not the input signal.
The compensation signal generated by the compensation block is variable according to a gain value which is determined by the feedback circuit, and the compensation signal variation occurs in a relationship of inverse proportionality with the gain value.
In practical embodiments, the compensation block includes at least one storage element, specifically a compensation capacitor having a terminal coupled to the input terminal of the amplifier.
The invention is useful with conventional compensation techniques. In particular, in a preferred embodiment of the invention, the operational amplifier includes a compensation of the Ahuja type, and is preferably connected in a non-inverting configuration.
This invention can be applied to systems wherein gain is neither predetermined nor predeterminable. The disclosed amplifier is also useful where the gain value varies with time. Another example where the load applied to the output of the amplifier is particularly variable in frequency with attendant instability of the operational parameters.
The technical problem is solved by an operational amplifier frequency self-compensated with respect to closed-loop gain, of the type described above and defined in the claims.
This problem is also solved by a method for frequency compensating adaptively an operational amplifier with respect to closed-loop gain, as defined in the claims.
The features and advantages of an operational amplifier according to this invention will be apparent from the description of embodiments thereof given by way of example and not of limitation with reference to the accompanying drawings.